ibm42f10snnaa20 IBM42F12SNNAA20 sff-1063/1250n-sw pth serial optical transceiver design & layout guide optxcvr.fm july 2000 page 1 introduction the sff-1063/1250n-sw is a small form factor (sff), plated through hole-type (pth) serial optical transceiver for use at distances up to 1804.6ft/550m in high data rate applications including fibre chan- nel arbitrated loop (fc-al) and gigabit ethernet. the transceiver receives serial optical signals and converts them into serial electrical signals. con- versely, it also receives serial electrical signals and retransmits them as optical signals. the transceiver uses 850nm short-wavelength light emitted by a vertical cavity surface emitter laser (vcsel) and operates at 1.063gbps (ibm42f10snnaa20) in fibre channel applications and at 1.250gbps (IBM42F12SNNAA20) in gigabit ethernet applications. the transceiver conforms to ansi fibre channel specification fc-0 for short- wavelength operation (100-m5-sn-i) and conforms to draft 2 of the ieee 802.3z 1000 base-sx stan- dard. the transceiver works with industry-standard ?8b/10b? serializer/deserializer modules and incorpo- rates circuits optimized for the 8b/10b protocol. the transceiver uses outgoing and incoming fiber channel paths. the preferred fiber optic medium is 50/125mm multimode, duplex (dual) optical fiber cable. a 62.5/125mm multimode fiber can be substi- tuted for shorter linking distances. single-mode 10/125mm single-mode fiber should not be used. a duplex lc-style miniature connector is used for the fiber optic input, a direct follow-on to the duplex sc- style connector that has long been used with ibm gbic products. however, the lc connector has been in service long enough to prove its reliability. the transceiver is a class 1 laser-safe product. under normal operation, optical power is at eyesafe levels. cables can be connected and disconnected while the transceiver is in operation. this application note should be used in conjunction with ibm engineering specification 1063/1250 mbd small form factor transceiver with signal detect, available from the ibm microelectronics web site at: www.chips.ibm.com/techlib/ products/fiberoptic/datasheets.html special design considerations as noted in the following paragraphs, the transceiver requires design considerations different from that of previous industry transceiver devices, namely the gbic and the 1x9. vcc supply in contrast to the ibm gbic, which requires 5vdc and has internally connected receiver and transmit- ter power pins, the transceiver requires 3.3vdc for receive and transmit power, which is applied at pins 2 and 6 (rx power and tx power) of the transceiver, respectively (figure 1). pins 2 and 6 may be tied together or fed separately, however better isolation between transmit and receive signals can be obtained with separate power feeds. logic levels the transceiver is compatible with 3-volt pecl logic technology for high speed transmit and receive inter- faces, and is compatible with 3-volt open-collector ttl technology for low speed logic lines. ac coupling to ensure ac coupling between the transceiver and the host logic or serdes module, a dc blocking capacitor is required in series with each of the two high speed input lines and each of the two high speed output lines. split-chassis grounds the transceiver chassis is divided into two electri- cally isolated halves: 1. the half near the optical fiber is electrically float- ing and must be connected to chassis ground (pins ca and cb) for best electrical shielding. 2. the half near the signal pins is electrically con- nected to logic ground inside the transceiver. pins sc through sf are electrically connected to pins 1 and 7 inside the sff transceiver and should be connected to the host logic ground. see grounding considerations on page 3 for more information.
application note sff-1063/1250n-sw pth serial optical transceiver design & layout guide page 2 optxcvr.fm july 2000 transmit/receive interface impedance unlike the ibm gbic, the sff transceiver ? s high speed transmit (tx_dat) and receive (rx_dat) data lines have a characteristic line-to-line imped- ance of 100 ohms and a line-to-ground impedance of 50 ohms (gbic and 1x9 transceiver devices have line-to-line and line-to-ground impedances of 150 and 75 ohms, respectively). physical size the transceiver occupies approximately half the vol- ume of gbic devices, making it possible to space optical fiber cable connections at about half the hori- zontal distance required for gbic devices. emi/emc/esd data paths because data rates on the lines to and from the serdes module are near 1 ghz, the ? fundamental ? is approximately 0.5 ghz and includes both higher order harmonics and lower frequency ? data noise. ? for best eye diagram characteristics, the transmit and receive data lines must make fast 1-0 and 0-1 transitions. therefore, a somewhat rich array of fre- quencies is present in these lines. to reduce crosstalk, susceptibility, and radiation in high speed data lines, consider the following design approaches: 1. keep data lines as short as possible. when lines approach 0.05 wavelength at 0.5 ghz (approxi- mately 0.79in/2cm), serious consideration should be given to matching impedances with pc board stripline or microstrip transmission lines at 100 ohms line-to-line or 50 ohms line-to- ground plane (see appendix a: stripline trans- mission lines on page 6). 2. when transmission lines are not used, it is still important to terminate at the serdes end with 100-ohm and 50-ohm equivalent impedances. transmit and receive impedances of internal serdes circuits must be considered when determining termination resistance. 3. keep differential pairs parallel, closely spaced, and the same length. avoid sharp corners in the path.separate the input data line pairs from the output data line pairs as much as possible and route them above signal ground planes. 4. particular care must be taken to space other wir- ing as far as practicable from data lines. wiring traversing these lines should cross at right angles on the opposite side of the ground plane. 5. to reduce reflections and radiation, maintain uniform data line land widths. for example, avoid abrupt width discontinuities when con- necting data lines to i/o connectors. use grad- ual line width increases and decreases whenever possible. figure 1: pinout (bottom view) pin description pin name type 1 rx ground logic ground 2rx power power 3 rx_sd+ status output 4 rx_dat- signal output 5 rx_dat+ signal output 6tx power power 7 tx ground logic ground 8 tx_disable+ control input 9 tx_dat+ signal input 10 tx_dat- signal input ca chassis ground chassis ground cb chassis ground chassis ground sc logic ground logic ground sd logic ground logic ground se logic ground logic ground sf logic ground logic ground 1 2345 10 9 8 7 6 ca cb sc sf se sd
application note sff-1063/1250n-sw pth serial optical transceiver design & layout guide optxcvr.fm july 2000 page 3 pc boards because the transceiver employs isolated power islands, multilayer pc boards must be used in the host board design. also, some designs require both chassis and logic grounds on the same board. finally, high speed data line routing would be very difficult without a ground plane under the differential data pairs. grounding considerations ground tabs the section of the transceiver chassis nearest the optical fiber connector has grounding tabs that must mesh firmly with the rectangular bezel cutout into which the transceiver is inserted. the bezel must be part of the main host chassis sheet metal or be well connected to the main chassis box through multi- point contacts. grounding techniques must follow good uhf/microwave shielding practices. excessive figure 2: simplified schematic uu u u optical +signal optical transmit parallel logic parallel sff optical optic fiber 10 0.01 8 4 rxdat+ 9 10 3 transceiver receive detect transmit pll power receive power transmit tx clock reference 0.01 10 - vcc 3.3v 10 0.01 0.01 10 - vcc 3.3v 1 h 1 h uu u u 10 0.01 0.01 10 - vcc 3.3v 1 h u uu u impedance matching network* - impedance matching network* - receive serdes and logic functions pll power 10 0.01 0.01 10 - vcc 3.3v 1 h uu u u 0.01 0.01 rxdat- tx_dat+ 0.01 0.01 tx_dat- post-amp and rx_sd 5 rx_sd ac modulator dc driver control and safety tx_disable photo receiver laser input optic fiber output 10 0.01 0.01 10 - vcc 3.3v * a resistor matching network may be required depending upon serdes circuit characteristics to match the serdes to the 50-ohm line-to-ground and 100-ohm line-to-line impedances of the transmit and receive differential data lines of the sff optical trans ceiver. all capacitances are in microfarads ( f). 10 f capacitors are tantalum; all others are ceramic. notes: logic ground rx ground tx ground 1 7 1 h u uu u rx power tx power 6 2 1k ** 1k ** 0.01 0.01 - - ** actual values for noise decoupling depend on the host pc board configuration.
application note sff-1063/1250n-sw pth serial optical transceiver design & layout guide page 4 optxcvr.fm july 2000 emi will be radiated through the bezel and bezel opening if the sff transceiver does not make good multipoint contact to a well-grounded host bezel. pin convention at this time there is not complete agreement among optical transceiver manufacturers on the use of ground pins sc through sf. some manufacturers do not offer split-chassis grounding, thus sc through sf are connected to a one-piece chassis. in this case, all ground pins ca through sf (although some pins might be omitted in some industry sff prod- ucts) are connected to box chassis ground. some manufacturers omit sc through sf from the trans- ceiver chassis, while others float ca and cb and retain sc through sf. ibm and several other manu- facturers offer the split-chassis grounding scheme whereby the pins are internally connected to logic ground (see split-chassis grounds on page 1. host pc board designers must consider these differ- ences when choosing sff transceiver suppliers. to maintain compatibility among the various manufac- turers, pins sc through sf should be floated to sep- arate the chassis and logic grounds. for designs using the ibm transceiver or an ibm-like transceiver exclusively, sc through sf along with pins 1 and 7 should be connected to chassis ground to provide maximum shielding and a ground connection for the high speed logic circuits. isolation good design practice normally suggests that chas- sis and logic grounds be tied together at only one point or in close proximity in an electrical system. historically, this tiepoint has been at the power sup- ply. however, when designing high speed digital transceiver circuits, one must also consider the effects emi, emc, and esd in addition to traditional ground loop problems. to minimize the effects of crosstalk, radiation, etc., it is sometimes necessary to connect the grounds at an alternate point in the system. the proper design of system grounding is complex and therefore must be carefully considered during the early stages of system design, whether it be a small box or many interconnected units. a big advantage of optical fiber coupling is that from a complex system standpoint, grounding can be bro- ken into electrically isolated boxes. because the logic and chassis grounds are normally tied together in the power supply, they should be isolated at the transceiver whenever possible to avoid ground loops. if this is not feasible, a 10-15 ohm resistor can be substituted for the direct con- nection at the power supply, with direct connection being made elsewhere in the chassis box. this grounding technique is currently being used by some computer manufacturers in their enclosure designs. if the logic and chassis grounds are not tied together in the power supply, they can be joined at the com- munication ports to minimize ground loops. this approach requires the logic and chassis grounds to be tied together at the transceiver in split-chassis designs. connecting the logic and chassis grounds at the communication ports has also proven effec- tive in some designs to minimize emi radiation and emc/esd susceptibility from the ports. enclosure because the host enclosure box uses copper inter- face cables and contains an exposed transceiver chassis, it poses the greatest risk for emi/emc/esd problems. to minimize these effects, the enclosure must make good electrical contact with the conduc- tive leaf springs around the opening for the trans- ceiver chassis. the opening must be in conductive material and be sized to match the dimensions shown in the 1063/1250 mbd small form factor transceiver with signal detect engineering specification. enclosure ventilation holes must not exceed 0.157in/4mm in diameter, and internal wiring should be kept away from the holes. cables and connectors all metallic interface cables should be shielded or use in-line filters to prevent emi and to provide good emc/esd compatibility. to support the use of unshielded cables outside the enclosure box, utp or similar connectors must be used. when using unshielded cables, wiring inside the enclosure must be shielded and kept away from the transceiver to prevent emi from radiating from the external inter- face cables.
application note sff-1063/1250n-sw pth serial optical transceiver design & layout guide optxcvr.fm july 2000 page 5 power isolation transceiver power island to reduce jitter and crosstalk through the power supply, a separate power island should be used to supply the transceiver. to create the island, power from vcc should be fed through a pi-network lc filter consisting of a 1 h series inductor and a capacitor network on either side of the inductor connected to the pc board ground plane. the capacitor network consists of a parallel combination of one 0.01 f ceramic and one 10 f tantalum capacitor. capaci- tors should be surface-mount, however components with extremely short leads may be used. serdes power islands some serdes modules provide separate power pins for the transmit and receive phase locked loop circuits and the remainder of the module electronics. each of these power domains should be isolated from the vcc supply using the pi-network isolation method described in the previous paragraph. depending on the host pc board layout and power supply characteristics, more high frequency (ceramic) and/or mid frequency (tantalum) bypass capacitors may be required. to increase capaci- tance, several capacitors should be paralleled rather than using a single large-value component to mini- mize inductance and esr. logic connections the low speed tx_disable input and rx_los output lines to and from the transceiver are open collector and ttl-compatible. rc deglitching should be used on the tx_disable line to desensitize it from electri- cal noise. each connection of the high speed tx_dat+/tx_dat- and rx_dat+/rx_dat- differ- ential line pairs between the transceiver and the serdes module should be decoupled with a 0.01 f capacitor. these lines have no series dc decoupling capacitors inside the transceiver module. mechanical some mechanical force is required to connect and disconnect optical fiber cables from the enclosure box. because this can exert mechanical forces on the host pc board, the transceiver-to-pc board and pc board-to-chassis mountings must be designed to handle the additional stress. cooling the transceiver ? s power dissipation is quite low, but it is not zero. because the transceiver package is small, some air flow around the device is required to maintain acceptable operating temperatures. con- vection cooling may be used only when enough space exists around the transceiver to permit suffi- cient air flow. manufacturing process because the transceiver is a non-wettable compo- nent, it must be soldered to the host pc board using a washless flux for both wave solder and hand sol- der processes. the protective cover shipped with the transceiver should not be removed during manu- facturing assembly processes, otherwise dust and evaporative matter could contaminate the optical assemblies. reasonable care should taken to not expose the transceiver to esd conditions during handling and particularly when inserting the device into the host pc board. the transceiver should be left in its con- ductive plastic packing until insertion, which should be done only under esd-controlled conditions. par- ticular care must be taken in low-humidity environ- ments. because of the very close tolerances required to mesh with the front bezel, it will probably be neces- sary to fixture all sff transceiver modules during the host pc board soldering process. laser safety the optical laser used in the transceiver is a class 1 laser-safe product. monitoring and control circuits inside the transceiver help to ensure safe laser oper- ation. however, the class 1 safety rating is valid only when the host power supply vcc remains below 4vdc. therefore, to ensure class 1 safety operation of the laser, the tx power voltage must not exceed 4vdc. the host power electronics must provide overvoltage protection to prevent tx power from exceeding 4vdc.
application note sff-1063/1250n-sw pth serial optical transceiver design & layout guide page 6 optxcvr.fm july 2000 appendix a: stripline transmission lines an example stripline transmission line configuration is shown in figure 3. a similar layout can be used on host pc board designs for long high speed data lines. the example transmission line is built on a glass-epoxy (fr4) pc board. the dimensions shown are taken from a stripline incorporated into an ibm test card and are for reference only. mathematical modeling of stripline transmission characteristics is complex due to the interaction of multiple pc board properties and parameters. the example stripline has a line-to-line impedance of just over 100 ohms and a line-to-ground impedance con- siderably higher than 50 ohms. although the ibm engineering specification 1063/1250 mbd small form factor transceiver with signal detect and this application note state that high speed data lines must have an impedance of 100 ohms line-to-line and 50 ohms line-to-ground, it is not possible to build a practical stripline to meet these require- ments. in applications where high-speed data lines remain entirely on the host pc board, the more critical of the two impedances is 100 ohms line-to-line for the dif- ferential pair. to achieve this impedance for a practi- cal stripline, the line-to-ground impedance of the differential pair must be considerably higher than 50 ohms. figure 3: stripline transmission line example note: all dimensions are in mils. 10.0 1.9 (0.5 oz copper foil and plating) 1.2 (1.0 oz copper) 4.0 4.5 fr4
? copyright international business machines corporation 2000 all rights reserved printed in the united states of america 07-2000 all information contained in this document is subject to change without notice. the products described in this docu- ment are not intended for use in implantation or other life support applications where malfunction may result in injury or death to persons. the information contained in this document does not affect or change ibm product specifications or warranties. nothing in this document shall operate as an express or implied license or indemnity under the intellec- tual property rights of ibm or third parties. all information contained in this document was obtained in specific environ- ments, and is presented as an illustration. the results obtained in other operating environments may vary. the information contained in this document is provided on an ? as is ? basis. in no event will ibm be liable for damages arising directly or indirectly from any use of the information contained in this document. ibm microelectronics division 1580 route 52, bldg. 504 hopewell junction, ny 12533-6351 the ibm home page can be found at http://www.ibm.com the ibm microelectronics division home page can be found at http://www.chips.ibm.com optxcvr.fm july 2000 ?
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